MTPLX/Releases/2.0.1

MTPLX 2.0.1

Released 2026-07-07. v2 promised the fastest decode profile as the default. 2.0.1 finishes that promise for every Mac: the turbo kernels now cover every dense model in the catalog, including the FP16 lane that M1 and M2 Macs route to and the 6-bit 9B that smaller machines run, and every lane validates itself on your silicon at load. Ordered by how much it changes your day.

1. Turbo is now the default for every dense model, on every Apple Silicon generation

In v2.0.0 the turbo default only covered the bf16-lane quantized 27Bs, so M1/M2 Macs (which route to the FP16 artifacts) and the 9B tier silently stayed on the slower sustained path. That gap is closed, with measurements on the artifacts themselves:

  • 27B Speed FP16 (the M1/M2 default): decode up 19 to 31 percent over the v2.0.0 default across 0.5k to 32k context (34.3 to 44.9 tok/s at short context, 27.6 to 36.1 at 32k, M5 Max). Against a true autoregressive baseline the speculative multiplier moves from 1.34x to about 2x.
  • Qwen 3.5 9B (6-bit, the 16 GB tier): brand-new 6-bit verify kernels. Decode up 33 to 62 percent (82.9 to 112.5 tok/s at short context, 61.6 to 99.7 at 8k), and 2k prefill up 43 percent.
  • 27B Speed q4, Quality q8: unchanged and re-verified flat across decode, prefill, TTFT, and peak memory in a full A/B against v2.0.0.

Per-tier honesty: the absolute tok/s numbers above are measured on an M5 Max and scale with your memory bandwidth. The kernels themselves are plain SIMD with no M5-only instructions on the default path; we measured the exact M1-to-M4 code path end to end (it keeps a 2.0 to 2.5x multiplier over true autoregressive decode on the promoted models) and run kernel exactness plus a live model smoke on real M1 hardware in CI. An M3 or M3 Ultra gets the same code path as an M1, plus the safety net below.

2. A new model: Qwen 3.6 27B Optimized Quality FP16

The M1/M2 tier had FP16 siblings for every speed artifact but not for Quality, so a quality pick on older silicon got an artifact its hardware handles worse. Youssofal/Qwen3.6-27B-MTPLX-Optimized-Quality-FP16 is now published and wired into the app picker, the CLI catalog, and the chip-aware routing: a Quality pick on M1/M2 resolves the FP16 sibling automatically, everywhere. Validated against the bf16 parent (matching argmax on every checked logit position, matching greedy continuations) and measured at 2.5x over true autoregressive decode under turbo.

3. The kernels prove themselves on your machine, every boot

Shipping kernel defaults for hardware we cannot buy every unit of needs a mechanism, not hope. At model load, every turbo kernel lane now runs a fast self-check against the stock MLX reference in your model's exact precision and quantization (it costs a few milliseconds). A lane that does not agree disables itself for the session and serving continues on the proven stock path; the verdicts are visible under kernel_selfcheck in /health. Worst case on unusual silicon is v2.0.0 speed, never wrong output.

For the curious: MTPLX_FORCE_GPU_FAMILY_FALLBACK=1 makes a newer Mac rehearse the exact code path older GPU families use.

4. Honest exclusions

  • The 35B A3B MoE models keep the sustained default: their expert layers bypass the current kernel patch. That is the headline 2.0.2 lane.
  • Gemma 4 keeps sustained: its assistant-pair architecture does not use the native MTP verify path these kernels accelerate.
  • The 4B stays sustained on purpose: turbo measured slightly slower there at matched depth, so per the flat-or-better rule it keeps its proven path.
  • Compiled verify stays off for 6-bit models for now; the 9B gains above come purely from the new verify kernels.

Reliability notes

Every promoted default went through logit-diff exactness gates on the real artifacts, snapshot-verified A/B decode baselines, a full pillar regression against v2.0.0 (decode from 0.5k to 128k context, prefill, warm TTFT, peak memory, all flat or better), and a real OpenCode agent session against the FP16 daemon with warm tool-turn restores.

Downloads

Sonoma or newer, Apple Silicon.

Get it. Download the current DMG, or brew upgrade mtplx / pip install -U mtplx. Every published speed number with its conditions is on the benchmarks page; the archive of every version is on the releases page.
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